NEUROPULS First General Assembly in Lisbon
The inaugural session of the NEUROPULS Project General Assembly, hosted by Luis Miguel Silveira and team at the Institute of Systems and Computer Engineering, Research and Development, took place in Lisbon on September 4-5, 2023. The assembly brought together 27 members from prestigious institutions.View more
Watch our first video on NEUROPULS YouTube channel!
Explore the future of computing with our first video: The Neuropuls Project unveils secure, energy-efficient hardware accelerators powered by revolutionary neuromorphic technology, explained by the partners.View more
Abstract
The Future of Computing: Unlocking the Potential of Neuromorphic Technology for Low-Power and Secure Edge Computing. With the rise of self-driving vehicles, IoT, and Industry 4.0, the need for processing massive amounts of data locally and securely has never been greater. Traditional electronic computing systems have limitations such as high latency and low energy-efficiency, which are no longer suitable for these applications. Neuromorphic computing, a brain-inspired approach, is the solution to these problems.
However, current neuromorphic electrical computing systems have their own limitations, which is why the NEUROPULS project is developing next-generation low-power and secure edge-computing systems. By utilizing novel photonic computing architectures and security layers based on photonic PUFs, augmented silicon photonics CMOS-compatible platforms, and emerging non-volatile phase change materials, this project aims to demonstrate a two-order of magnitude improvement in energy efficiency. With RISC-V compliant interfaces and a novel full-system simulation platform, NEUROPULS will revolutionize the future of computing.
Objectives
NEUROPULS will develop -for the first time- secure hardware accelerators based on novel neuromorphic architectures and PUF-based security layers leveraging the benefits offered by the integration of photonics, PCMs and III-V materials. This integration will provide superior security, energy-efficiency, and speeds for spiking and formal recurrent NNs when compared to current available technology for the selected use-cases.
- Objective 1: Development of a CMOS-compatible platform addressing the integration of silicon photonics with PCMs and III-V materials
- Objective 2: Development of a low-power and secure RISC-V interfaced neuromorphic accelerator based on the integration of silicon photonics, novel PCMs, and Q-switched III-V lasers
- Objective 3: Development of a system-level simulation platform for PCM-based photonic low-power accelerators using photonic security layers
This project has received funding from the European Union’s Horizon Europe research and innovation programme under grant agreement No 101070238 . This publication [communication] reflects the views only of the author, and the Commission cannot be held responsible for any use which may be made of the information contained therein.
[ CNRS ]
France
Fabio Pavanello
Fabio Pavanello
Photonics for hardware security, neuromorphic computing, and communications - Project Coordinator, development of PUFs and PCM devices
ECOLE CENTRALE DE LYON
[ ECL ]
France
Ian O'Connor
Ian O'Connor
UNIVERSITE DIJON BOURGOGNE
[ UB ]
France
Benoit Cluzel
Benoit Cluzel
COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
[ CEA LETI ]
France
Benoit Charbonnier
Benoit Charbonnier
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UNIVERSITEIT GENT
[ UGent ]
Belgium
eu-team@ugent.be eu-team@ugent.be
eu-team@ugent.be eu-team@ugent.be
POLITECNICO DI TORINO
[ POLITO ]
Italy
Alessandro Savino
Alessandro Savino
POLITO PI and WP6 leader
INSTITUTO DE ENGENHARIA DE SISTEMAS E COMPUTADORES, INVESTIGACAO E DESENVOLVIMENTO EM LISBOA
[ INESC ID ]
Portugal
L. Miguel Silveira
L. Miguel Silveira
INESC-ID Project Coordinator, work in Modeling and Simulation
BARCELONA SUPERCOMPUTING CENTER CENTRO NACIONAL DE SUPERCOMPUTACION
[ BSC CNS ]
Spain
Vanessa Fernandez Descalzo
Vanessa Fernandez Descalzo
HEWLETT PACKARD ENTERPRISE BELGIUM
[ HPE Belgium ]
Belgium
Thomas Van Vaerenbergh
Thomas Van Vaerenbergh
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ALBORA TECHNOLOGIES SL
[ AT ]
Spain
Anselm Adams
Anselm Adams
.png)
ETHNIKO KAI KAPODISTRIAKO PANEPISTIMIO ATHINON
[ NKUA ]
Greece
Dimitris Gizopoulos
Dimitris Gizopoulos
National and Kapodistrian University of Athens PI
LUDWIG-MAXIMILIANS-UNIVERSITAET MUENCHEN
[ LMU MUENCHEN ]
Germany
Jonas Tillinger
Jonas Tillinger
ARGOTECH AS
[ ARGO ]
CZ
František Kaván
František Kaván
UNIVERSITA DEGLI STUDI DI VERONA
[ UNIVR ]
Italy
Cecilia Negri
Cecilia Negri
TECHNISCHE UNIVERSITAT BERLIN
[ TUB ]
Allemagne
Ulrich Rührmair
Ulrich Rührmair
graph - chart
news
events
PROJECT GENERAL ASSEMBLY #3
NEUROPULS third Project General Assembly will be held on December 9 and 10 in Canazei, Italy. The assembly will be hosted by University of Verona (UNIVR), one of the project's partners to discuss the progress of the project and plan for future activities.
PROJECT PROGRESS MEETING #4
The fourth Project Progress Meeting will take place via videoconference on Friday, 5th of July from 3:00 P.M. to 4:00 P.M. to assess project overall progress, to discuss objectives, workplan, next face-to-face meeting, communication.
PROJECT GENERAL ASSEMBLY #2
The second project general assembly of NEUROPULS will be held on March the 21st and 22nd in Barcelona, Spain. The assembly will be hosted by BSC (Barcelona Supercomputing Center), one of the project's partners to discuss the progress of the project and plan for future activities.
PROJECT PROGRESS MEETING #3
The third Project Progress Meeting will take place via videoconference on Friday, 1st of December from 3:00 P.M. to 4:00 P.M. to assess project overall progress, to discuss objectives, workplan, next face-to-face meeting, communication.
Project General Assembly #1
NEUROPULS has announced that its first project general assembly will be held on September 4 and 5 in Lisbon, Portugal. The assembly will be hosted by INESC-ID, one of the project's partners to discuss the progress of the project and plan for future activities.
PROJECT PROGRESS MEETING #2
The second Project Progress Meeting will take place via videoconference on Thursday, 6th of April from 3:00 P.M. to 4:00 P.M. to assess project overall progress, to discuss objectives, workplan, next face-to-face meeting, communication.
Project Progress Meeting #1
The first Project Progress Meeting will occur via videoconference on Thursday, 6th of April from 3:00 P.M. to 4:00 P.M. to assess project overall progress, to discuss objectives, workplan, next face-to-face meeting, communication.
NEUROPULS Kick-Off Meeting - 2023
The Kick-Off Meeting of NEUROPULS project will take place in Ecully (FR) on the 26th of January, 2023
documents
Automated Black-box Testing of Mass Assignment Vulnerabilities in RESTful APIs
Complexity Assessment of Analog Security Primitives Using the Disentropy of Autocorrelation
Enabling Design Space Exploration of RISC-V Accelerator-rich Computing Systems on gem5
Energy Efficiency of Out-of-Order CPUs: Comparative Study and Microarchitectural Hotspot Characterization of RISC-V Designs
Estimating the Failures and Silent Errors Rates of CPUs Across ISAs and Microarchitectures
gem5-MARVEL: Microarchitecture-Level Resilience Analysis of Heterogeneous SoC Architectures
Harpocrates: Breaking the Silence of CPU Faults through Hardware-in-the-Loop Program Generation
Harpocrates: Breaking the Silence of CPU Faults through Hardware-in-the-Loop Program Generation
Impact of Voltage Scaling on Soft Errors Susceptibility of Multicore Server CPUs
Lighting the way to better security - The NEUROPULS photonics-based approach
Neuromorphic architectures based on augmented silicon photonics platforms
Optical Properties of GeSe1-x Tex Chalcogenide MaterialsPromising for on-Chip Low and Ultra-Low LossReconfigurable Photonics and Nonlinear Devices
Phase-change materials for photonic applications
Photonic Physical Unclonable Function Based on Symmetric Microring Resonator Arrays
Remote Attestation of IoT Devices using Physically Unclonable Functions: Recent Advancements and Open Research Challenges
Security layers and related services within the Horizon Europe NEUROPULS project
Silent Data Corruptions in Computing Systems: Early Predictions and Large-Scale Measurements
Silent Data Corruptions: Microarchitectural Perspectives
Silent Data Errors: Sources, Detection, and Modeling
SimPoint-Based Microarchitectural Hotspot & Energy-Efficiency Analysis of RISC-V OoO CPUs
The Impact of Feature Representation on the Accuracy of Photonic Neural Networks
D1.2 Data Management Plan
D5.9 System architecture model and simulation platform: iteration 1
D6.1 Metrics Definition
D7.10 Update to the exploitation plan: iteration 1
D7.1 Visual identity, project website and social network account
D7.2 Update to the dissemination and communication plan: iteration 1
NEUROPULS Project presentation A3 Poster
NEUROPULS Project presentation A5 Flyer
NEUROPULS Use cases A0 Scientific Poster
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