The Future of Computing: Unlocking the Potential of Neuromorphic Technology for Low-Power and Secure Edge Computing. With the rise of self-driving vehicles, IoT, and Industry 4.0, the need for processing massive amounts of data locally and securely has never been greater. Traditional electronic computing systems have limitations such as high latency and low energy-efficiency, which are no longer suitable for these applications. Neuromorphic computing, a brain-inspired approach, is the solution to these problems.
However, current neuromorphic electrical computing systems have their own limitations, which is why the NEUROPULS project is developing next-generation low-power and secure edge-computing systems. By utilizing novel photonic computing architectures and security layers based on photonic PUFs, augmented silicon photonics CMOS-compatible platforms, and emerging non-volatile phase change materials, this project aims to demonstrate a two-order of magnitude improvement in energy efficiency. With RISC-V compliant interfaces and a novel full-system simulation platform, NEUROPULS will revolutionize the future of computing.
NEUROPULS will develop -for the first time- secure hardware accelerators based on novel neuromorphic architectures and PUF-based security layers leveraging the benefits offered by the integration of photonics, PCMs and III-V materials. This integration will provide superior security, energy-efficiency, and speeds for spiking and formal recurrent NNs when compared to current available technology for the selected use-cases.
This project has received funding from the European Union’s Horizon Europe research and innovation programme under grant agreement No 101070238 . This publication [communication] reflects the views only of the author, and the Commission cannot be held responsible for any use which may be made of the information contained therein.
[ CNRS ]
Photonics for hardware security, neuromorphic computing, and communications - Project Coordinator, development of PUFs and PCM devices
ECOLE CENTRALE DE LYON
[ ECL ]
UNIVERSITE DIJON BOURGOGNE
[ UB ]
COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
[ CEA LETI ]
[ UGent ]
POLITECNICO DI TORINO
[ POLITO ]
POLITO PI and WP6 leader
INSTITUTO DE ENGENHARIA DE SISTEMAS E COMPUTADORES, INVESTIGACAO E DESENVOLVIMENTO EM LISBOA
[ INESC ID ]
L. Miguel Silveira
INESC-ID Project Coordinator, work in Modeling and Simulation
BARCELONA SUPERCOMPUTING CENTER CENTRO NACIONAL DE SUPERCOMPUTACION
[ BSC CNS ]
Vanessa Fernandez Descalzo
HEWLETT PACKARD ENTERPRISE BELGIUM
[ HPE Belgium ]
Thomas Van Vaerenbergh
ALBORA TECHNOLOGIES SL
[ AT ]
ETHNIKO KAI KAPODISTRIAKO PANEPISTIMIO ATHINON
[ NKUA ]
National and Kapodistrian University of Athens PI
[ LMU MUENCHEN ]
[ ARGO ]
UNIVERSITA DEGLI STUDI DI VERONA
[ UNIVR ]
NEUROPULS has announced that its first project general assembly will be held on September 4 and 5 of this year in Lisbon, Portugal. The assembly will be hosted by INESC-ID, one of the project's partners to discuss the progress of the project and plan for future activities.