However, current neuromorphic electrical computing systems have their own limitations, which is why the NEUROPULS project is developing next-generation low-power and secure edge-computing systems. By utilizing novel photonic computing architectures and security layers based on photonic PUFs, augmented silicon photonics CMOS-compatible platforms, and emerging non-volatile phase change materials, this project aims to demonstrate a two-order of magnitude improvement in energy efficiency. With RISC-V compliant interfaces and a novel full-system simulation platform, NEUROPULS will revolutionize the future of computing.

 

  • Objective 1: Development of a CMOS-compatible platform addressing the integration of silicon photonics with PCMs and III-V materials
  • Objective 2: Development of a low-power and secure RISC-V interfaced neuromorphic accelerator based on the integration of silicon photonics, novel PCMs, and Q-switched III-V lasers
  • Objective 3: Development of a system-level simulation platform for PCM-based photonic low-power accelerators using photonic security layers

 

This project has received funding from the European Union’s Horizon Europe research and innovation programme under grant agreement No 101070238 . This publication [communication] reflects the views only of the author, and the Commission cannot be held responsible for any use which may be made of the information contained therein.

partners / contact

Centre National de la Recherche Scientifique

[ CNRS ]

France

Fabio Pavanello

Fabio Pavanello

Photonics for hardware security, neuromorphic computing, and communications - Project Coordinator, development of PUFs and PCM devices

ECOLE CENTRALE DE LYON

[ ECL ]

France

Cédric Marchand

Cédric Marchand

Emerging technologies for hardware security of computing architectures.

UNIVERSITE DIJON BOURGOGNE

[ UB ]

France

Benoit Cluzel

Benoit Cluzel

COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

[ CEA LETI ]

France

Benoit Charbonnier

Benoit Charbonnier

UNIVERSITEIT GENT

[ UGent ]

Belgium

Peter Bienstman

Peter Bienstman

Professor at University of Gent

POLITECNICO DI TORINO

[ POLITO ]

Italy

Alessandro Savino

Alessandro Savino

POLITO PI and WP6 leader

INSTITUTO DE ENGENHARIA DE SISTEMAS E COMPUTADORES, INVESTIGACAO E DESENVOLVIMENTO EM LISBOA

[ INESC ID ]

Portugal

L. Miguel Silveira

L. Miguel Silveira

INESC-ID Project Coordinator, work in Modeling and Simulation

BARCELONA SUPERCOMPUTING CENTER CENTRO NACIONAL DE SUPERCOMPUTACION

[ BSC CNS ]

Spain

Francisco Cazorla

Francisco Cazorla

Hardware for high-performance systems and edge systems

HEWLETT PACKARD ENTERPRISE BELGIUM

[ HPE Belgium ]

Belgium

Thomas Van Vaerenbergh

Thomas Van Vaerenbergh

WP7 - Dissemination and exploitation - leader

ALBORA TECHNOLOGIES SL

[ AT ]

Spain

Anselm Adams

Anselm Adams

ETHNIKO KAI KAPODISTRIAKO PANEPISTIMIO ATHINON

[ NKUA ]

Greece

Dimitris Gizopoulos

Dimitris Gizopoulos

National and Kapodistrian University of Athens PI

LUDWIG-MAXIMILIANS-UNIVERSITAET MUENCHEN

[ LMU MUENCHEN ]

Germany

Jonas Tillinger

Jonas Tillinger

ARGOTECH AS

[ ARGO ]

Czech Republic

František Kaván

František Kaván

Complete packaging services for Neuropuls photonic and electronic structures. Designs, simulations, prototyping.

UNIVERSITA DEGLI STUDI DI VERONA

[ UNIVR ]

Italy

Mariano Ceccato

Mariano Ceccato

Associate professor in Computer Science at Univ. of Verona

TECHNISCHE UNIVERSITAT BERLIN

[ TUB ]

Allemagne

Jean-Pierre Seifert

Jean-Pierre Seifert

Professor for Computer & Communication Security, TU Berlin, Germany

graph - chart

Start 01/01/2023
65% 08/03/2026
End 31/12/2027
Budget allocation . M€ Budget allocation
Effort 1017 p*m Effort
Effort 17 persons Full time equivalent

news

European Neuromorphic Computing Perspectives #1 : NimbleAI

2026-02-18

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NEUROPULS Featured in EE Times Europe’s November 2025 Issue

2025-12-02

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Review Meeting and 5th Project General Assembly in Brussels

2025-10-09